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  • A Hybrid Approach to Radiation Fault Tolerance in Small Satellite Applications

    Paper number

    IAC-11,E2,1,1,x10575

    Author

    Mr. Nishchay Mhatre, College of Engineering Pune, India

    Coauthor

    Mr. Shravan Aras, College of Engineering Pune, India

    Year

    2011

    Abstract
    Radiation presents a significant hazard, in the form of Single Event Upsets (SEU), to small satellite missions in Low Earth Orbit, due to the
    proximity of the orbits to the Van Allen radiation belts. 
    Radiation-hardened electronics are prohibitively expensive and hard to source for small satellite 
    projects, particularly student satellites. 
    However, using a mixture of fault tolerant circuitry and error correction coding, we can overcome
    the SEU hazards for an insignificant cost. Such a hybrid radiation fault tolerance method for a 
    pico-satellite On Board Computer (OBC), is described in this paper. These radiation fault tolerance features have been designed as part of the COEP Communication Satellite, a student designed Ham communication pico-satellite. This work also covers the integration of these features with the overall design of the OBC.
    The aim of this design is to ensure protection and recovery from SEU's in the proposed orbit for the 
    duration of the mission, without depending on expensive radiation-hardened devices. 
    A combination of `watch-dog' hardware, that extracts the OBC from possible hang-ups and error 
    correction coding (ECC) in program memories has been used. An innovative method for achieving Triple Modular Redundancy (TMR) in program memory, without special hardware support, has been developed.
    A Hamming Code has been used to correct all single bit errors in memories. A constant-time Single 
    Error Correction algorithm for fast `Data-Scrubbing' has been developed and implemented using the ARM based micro-controller of the OBC. 
    Tests on the hardware and software have proved their ability to correct hang-ups and errors.
    Correction of single bit flips in the OBC memories has demonstrated in constant time, thus assuring
    real-time operation. OBC hang-ups have been successfully resolved by the watch-dog in real time. A 50 percent saving in storage space over conventional TMR has been achieved. Finally, the fault tolerance features have been successfully integrated into the satellite OBC.
    Abstract document

    IAC-11,E2,1,1,x10575.brief.pdf

    Manuscript document

    IAC-11,E2,1,1,x10575.pdf (🔒 authorized access only).

    To get the manuscript, please contact IAF Secretariat.