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  • Space Plug and Play Avionics for Small Satellites

    Paper number

    IAC-12,B4,7A,5,x15219

    Author

    Dr. Toshinori Kuwahara, Tohoku University, Japan

    Coauthor

    Prof.Dr. Kazuya Yoshida, Tohoku University, Japan

    Coauthor

    Dr. Yuji Sakamoto, Tohoku University, Japan

    Coauthor

    Mr. Yoshihiro Tomioka, Tohoku University, Japan

    Coauthor

    Mr. Kazufumi Fukuda, Tohoku University, Japan

    Coauthor

    Mr. Yoshihiko Shibuya, Tohoku University, Japan

    Year

    2012

    Abstract
    Tohoku University has been very active in the field of small satellite development for years and is one of the few Japanese universities which have experience with 50 kg class micro-satellites. Tohoku University has successfully developed, launched, and operated its first micro-satellite SPRITE-SAT (renamed as RISING-1 after the launch), has completed the second microsatellite RISING-2, is developing its third microsatellite RISESAT and is completing its first Cubesat RAIKO. Among these, the RISESAT is dedicated to international scientific missions with instruments developed by international partners. This project is funded by a Japanese FIRST (Funding Program for World-Leading Innovative R&D on Science and Technology) program led by Professor Shinichi Nakasuka of University of Tokyo. The launch of the RISESAT is planned to be in the second half of 2013. 
    The scientific instruments network of the RISESAT is established by so-called Space Plug and Play Avionics (SPA) standard technology. Each unit of 6 different kind of scientific instruments is remotely controlled by a Remote Terminal Unit (RTU) and these RTUs are connected with the central processing unit, called SHU: Science Handling Unit, via SPA interface. In order to make the most use of previous heritage at Tohoku University, the SHU is then controlled by the satellite’s main on-board computer via traditional interface. Though this SHU is not the main on-board computer of the RISESAT, the established architecture and technology can be utilized as the central electrical architecture for future small satellites without the traditional main computer. This will improve the rapid and cost-effective development performance of small satellites. This paper will describe the detail of this architecture of the RISESAT and the results of engineering model development, integration and verification.
    Abstract document

    IAC-12,B4,7A,5,x15219.brief.pdf

    Manuscript document

    IAC-12,B4,7A,5,x15219.pdf (🔒 authorized access only).

    To get the manuscript, please contact IAF Secretariat.