a modified parallel carrier synchronization structure based on aprx for psk
- Paper number
IAC-15,B2,IP,6,x30500
- Author
Mr. Shen Zhou, China
- Coauthor
Ms. Liu YingChun, China
- Year
2015
- Abstract
The all-digital Parallel Costas Loop based on advanced parallel receiver (APRX) has been used widely to receive the high rate satellite-to-ground data (e.g. several hundred megabits per second or even higher), completed by processing the digital signal from A/D conversion. But the digitalizing process will introduce the new instability to the receiver system, which makes the determination of APRX parameters is tedious. On the other hand, as the FPGA programmable logic device is gradually applied to the receiver, the realization of all digital carrier synchronization has been seriously depended on the time precision of the FPGA work clock, and the parallel processing method should be used due to the extremely high intermediate frequency modulation signal. A modified APRX structure based on the sampling methodology, all digital phase-locked loop technology and the Costas Loop is proposed in this paper to realize the synchronization of carrier signal PSK demodulation. Firstly, the theoretical analysis of the performance and parameters of the loop in the APRX structure including the three phase modules (the detector, the loop filter and the numerical control oscillator) were given. Secondly, the empirical curves about the changeable relation between the acquisition times on the phase error jitter were illustrated and the optional parameters for the second loop filter were calculated through the modeling and simulation tool. The acquisition times were shown to be the negative correlation with the phase error so that these two key parameters couldn’t be optimized at the same time. Furthermore, a modified structure embedding a new loop filter was carried out. The embedded filter is called as the adapted loop filter (ALF), which is usually used to adjust the loop filter parameters dynamically according to the phase error introduced by the phase detector. The parameter generator can give the most suitable parameters of the loop filter in the real time, and the shorter acquisition cycle could be gained as well as the improvement of the stability of the error fluctuation. Finally, the simulation results are indicated that the performance of this modified structure was better than those structures with the fixed loop filter parameters.
- Abstract document
- Manuscript document
(absent)