Democracy in Outer Space
- Paper number
IAC-04-IISL.4.04
- Author
Mr. Valnora Leister, United States
- Year
2004
- Abstract
The goal of this paper is to describe the operational design of the small satellite Flying Laptop which is developed by the Institute of Space Systems at the Universität Stuttgart within the Stuttgart Small Satellite Program. The Flying Laptop with a mass of about 120 kg is the test bed for an on-board computer with a reconfigurable, redundant and self-controlling high computational ability which is purely based on a field programmable gate array (FPGA). The developed operational concept with a combination of attitude control modes, mechanical configuration of sensors and actuators, communication strategy and power management, which are driven by hardware-implemented control logic within the FPGA will be described in detail including simulation results achieved using the Model-based Development and Verification Environment (MDVE) - an industrial S/C simulation infrastructure sponsored by EADS Astrium.
The mission objectives of the Flying Laptop are new technologies demonstrations and scientific earth observations and experiments, which utilize the three different payload camera systems with the ground sampling distance of 25/100/200 m, respectively, the high accurate attitude control system with pointing knowledge of better than 7 arcseconds and the Ka-band high-speed communication system with a baud rate of up to 0.5 Gbps, all of which are exceptional for small satellites. Those experiments are: atmospheric absorption measurement, precipitation measurement, near earth asteroid detection, bi-directional reflectance distribution function measurement, GPS attitude determination experiments and Rent-a-sat mode in which the entire satellite including the FPGA on-board computer is lent to third parties. The developed operational timeline makes these missions possible within the planned two years of life time. The Flying Laptop has three main system modes: safe, idle, and active operation mode. The attitude control modes, which shall support these system modes consist of six different control modes: detumbling, safe, idle, nadir pointing, target pointing, and inertial pointing mode. The hierarchical architecture of the subsystem and components modes are developed in a state machine diagram and tested by means of MathWorks Simulink-/Stateflow Toolbox. This state machine diagram is then implemented into FPGA hardware control algorithm and verified its functionality in the hardware-in-the-loop verification environment under MDVE.
To make the most of the characteristics of the FPGA technology, trade-off studies of on-board autonomy and ground operation has been performed. In addition to these, international cooperation with other Universities in operating the Flying Laptop is under coordination. Finally, the commanding concept will be also described.
- Abstract document