Onboard Reconfigurable Communication Equipment for next generation satellite

Paper number

IAC-05-B3.1.05

Author

Mr. Masayoshi Yoneda, NEC TOSHIBA Space Systems (NTS), Japan

Coauthor

Mr. Kenji Haga, NEC TOSHIBA Space Systems (NTS), Japan

Coauthor

Mr. Hideto Okada, NEC TOSHIBA Space Systems (NTS), Japan

Year

2005

Abstract

Onboard equipments are becoming much more complex with the evolution towards multimedia applications, but unfortunately, hardened space processors that would normally do the onboard processing typically lag behind ground-based processors by 10 
years. Moreover, it is difficult to apply the new communication technology appeared after launching. The lifetime of communications satellites in recent years on orbit is over 10 years, and it is impossible to exchange or upgrade the mission equipment loading the satellite after deploying in the orbit.
   The use of reconfigurable logic and processors for onboard equipments provides numerous benefits. Software designs can be easily upgraded after launch, higher performance can be achieved than with software based processing, and costs can be reduced by using common hardware designs.
   This paper describes the on going development of a radiation tolerant Reconfigurable Communication Equipment (RCE).
The RCE consists of a chassis containing power converters, analog unit, and digital processing hardware including; analog to digital converters (ADC), digital to analog converter (DAC), reconfigurable circuits using three identical SRAM type FPGAs, controller using one non-volatile FPGA, and flash memory modules.
   The successful use of a SRAM type FPGAs using on-board equipment must address several issues. First, it is necessary to detect upsets in the configuration memory of SRAM type FPGAs, and reload the device with the correct configuration. The main SEU detection scheme for SRAM type FPGAs is adopted bit-stream readback using a CRC algorithm to verify the configuration SRAM contents against a pre-calculated, pre-loaded CRC value that is stored in the memory block.
Second, there must be a mechanism to store multiple configurations onboard, upload new configurations into the FPGA. To store many kinds of much configuration data, each data files are compressed in advance and are unpacked at loading operation.
Two service classes can be offered in this RCE. Triple module redundancy system can be configured with three SRAM type FPGAs in a bank for high reliable service. For high throughput service, these three SRAM type FPGAs are connected serially.
   This proto type RCE has been tested successfully with loading several applications, such as M-PSK demodulator, modulator, and filter-bank. Demodulation and modulation rate is alternate from 16kbps to 2Mbps by changing processing software. Main functions of filter-bank applications are demultiplexing, switching, and multiplexing. This filter-bank realizes highly efficient multi-carrier communication systems. 

Abstract document

IAC-05-B3.1.05.pdf

Manuscript document

IAC-05-B3.1.05.pdf (🔒 authorized access only).

To get the manuscript, please contact IAF Secretariat.