Adaptive Computers in Space – A framework for in-flight HW-reconfigurable processors using high density FPGAs
- Paper number
IAC-09.D3.3.7
- Author
Prof. Harald Michalik, IDA TU Braunschweig, Germany
- Coauthor
Mr. Bjoern Osterloh, IDA TU Braunschweig, Germany
- Coauthor
Mr. Bjoern Fiethe, IDA TU Braunschweig, Germany
- Year
2009
- Abstract
The demand for high-performance on-board processing in space applications drastically increases especially in space science missions because complex high performance and low power imaging instruments are available today but the power limitation in the downlink remains. The solution is to shift specific processing functions into the instrument hardware creating the need of functionally specialized high performance computers and also the capability for in-orbit adaptability of these specialized functions, e.g. during long life missions. Today FPGAs with large gate counts provide a highly flexible platform where an entire system may be implemented in a single device. Meanwhile, those devices are available with qualification for space applications. They allow for so-called System-On-Chip implementation of complex processing functions in dedicated hardware. A complex system is generally composed of many functional discrete modules connected by a communication architecture. In some applications not all of the functional modules need to operate concurrently. A functional module could be requested on demand and also could be replaced with an updated function during a mission to improve processing performance. These enhancements are covered by dynamic partial reconfiguration and in-flight reconfigurability. Dynamic partial reconfiguration permits a limited, predefined portion of an FPGA to be reconfigured while the remainder of the device continues to operate. This is especially valuable where devices operate in a mission-critical environment and cannot be disrupted while subsystems are redefined. Furthermore it allows for performance improvement, e.g. update of HW-processing algorithms. To achieve these advanced system enhancements the requirements for applications in the harsh space environment have to be considered to guarantee high reliability: • A safe configuration data transfer to S/C with on-board validation ability is necessary to guarantee data integrity • The configuration data has to be saved in a high reliable non-volatile memory with backup option. • If necessary, error mitigation techniques like scrubbing have to be provided • The on ground achieved qualification of the system has to be guaranteed even after a module update • Effects during the dynamic partial reconfiguration have to be considered to prevent an operational interruption of the system. In this paper we present our framework for HW adaptive computers in space. The design to meet the requirements for a high reliable system is presented. We demonstrate the application of advanced adaptive computing on the example of the DPU design for the magnetographic imager PHI on ESA‘s Solar Orbiter Mission and we address the suitability of this approach for general advanced spacecraft computers.
- Abstract document
- Manuscript document
(absent)