the research on sequential switching shunt regulator based on small signal model
- Paper number
IAC-11,C3,3,8,x10024
- Author
Dr. Yonggang Chen, CAST, China
- Coauthor
Prof. Tingzhong Li, China
- Coauthor
Prof. Wan Cheng'an, China Academy of Space Technology (CAST), China
- Year
2011
- Abstract
This paper presents an analysis of the Sequential Switching Shunt Regulator(S3R). Firstly, the operating principle of S3R is introduced. S3R is a important component of the spacecraft power system. At the period of the sunlight, it transfers the power which is generated by the solar arrays to the spacecraft. When the power has met the requirment, the rest will be shunted to the ground to maintain the bus voltage by a switch of S3R. Secondly, the small signal model of S3R is built up. Then its open-loop output impedance is described as Zeq=Rsh/(1+RshCs) closed-loop output impedance is described as Zo=Zeq/(1+ZeqFmA(s)) where Rsh is the equivalent impedance of the solar arrays, C is the bus capacitor, A(s) is the main error amplifier gain, Fm=kh*Ip, kh is the current of a solar array, Ip is the controller gain. Based on the above equations, a conclusion can be got that the output impedance of S3R is affected by the bus capacitor. Therefor, how to design the bus capacitor is researched based on the analysis of the bus voltage ripple, and it is C$>$IL(Ip-IL)/(Ip*fmax*$\Delta$U-2IL*ESR*fmax*(Ip-IL)) where IL is load current, fmax is the biggest operating frequency, $\Delta$U is the ripple voltage, ESR is the equivalent series resistance of C. A diagram is given to show how the bus capacitor value changes with the loads current and operating frequency. At last, the simulation model and experimental circuit of S3R is built up. Considering the parasitic capacitor of the solar arrays, a large di/dt will be introduced into the circuit when the switch of S3R turns on.So an exclusive circuit is designed to eliminate the di/dt. Conclusions: In this paper, the output impedance of open-loop and closed-loop of S3R is researched based on the analysis of the operating principle and the small signal model. The bus capacitor design is then discussed combined with the analysis of the bus voltage ripple, and the curve which depicts the changes of bus capacitor value is given. The design is verified by simulation and experimental results.- Abstract document
- Manuscript document
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