A practice using AADL in the design of on-board embedded systems
- Paper number
IAC-12,D1,3,5,x15291
- Author
Mr. Nan Li, Chinese Academy of Sciences, China
- Year
2012
- Abstract
Techniques for creating high-reliability embedded systems have focused historically on safety-critical fields, where system failures can have fatal consequences. The aerospace industry is one of them. Since many relevant theories and methods are widely applied in the ground products, there are some good thoughts which is mature enough to be used in the design process for on-board embedded systems. Here is our experience when using SAE Architecture Analysis & Design Language (AADL) and some design patterns in our on-board embedded system. The embedded system is composed of one Xilinx FPGA with a Microblaze as its processor, two chips for USB2.0 phy layer, two pieces of Nor flash chips, two pieces of SRAM chips, and several chips for LVDS transfer, as well as a watchdog. The system is like a data router. The main mission of it is to receive data from USB port, then route the data packets to the proper positions on other storage devices through LVDS port. The relationship between the data packets and the indexes which is used to fetch the data from USB port when needed is stored in Nor flash at all times as soon as possible for the sake of sudden poweroff. Meanwhile, the system keeps the storage devices under management, monitoring the health status of the devices and putting the data into the ones in good status with some average-bared strategy. AADL is used with OSATE to model the function blocks of the embedded software (implemented by C program language, using object-oriented method), and the blocks of FPGA logic(implemented by VHDL program language, using behavioral model and RTL model). And some real time design patterns for embedded systems are used in the model. Because of the limited resource of the FPGA, there is no embedded operating system used here. The model is very useful for the co-design process of the embedded software and FPGA logic, as well as the FMEA process.
- Abstract document
- Manuscript document
(absent)