the design of the compass navigation receiver based on the technology of sopc
- Paper number
IAC-14,B2,2,2,x23147
- Author
Mr. Shen Zhifei, China
- Coauthor
Mr. Chen Cong, China
- Coauthor
Mrs. Zhang Xiaofei, China
- Coauthor
Mr. He Weihua, China
- Year
2014
- Abstract
As the Compass navigation receiver, implemented based on FPGA, has high energy consumption and high cost, in this paper, we propose an implementation of Application Specific Integrated Circuit (ASIC) based on the technology of System-on-a-Programmable-Chip (SOPC). Specially, the paper gives the detailed investigation on the key technologies required for the design and the roles of each module in the system are studied. In addition, we make notes about the possible problems which may be encountered in design. This scheme can effectively reduce power consumption of the system, fitting for low-cost, high-volume designs, which will provide some guidance for the development of the Compass navigation receiver.
- Abstract document
- Manuscript document
IAC-14,B2,2,2,x23147.pdf (🔒 authorized access only).
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