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  • ON-BOARD PROCESSING OF SAR DATA

    Paper number

    IAC-16,B1,3,10,x34643

    Coauthor

    Mr. Brian Lawrence, Canadian Space Agency, Canada

    Coauthor

    Mr. Patrick Plourde, Canadian Space Agency, Canada

    Coauthor

    Dr. Ralph Girard, Canadian Space Agency, Canada

    Coauthor

    Mr. Philip Melanson, Canadian Space Agency, Canada

    Coauthor

    Mr. Régent L'Archevêque, Canadian Space Agency, Canada

    Year

    2016

    Abstract
    As the quantity of data collected by satellite-based missions continues to increase, so too does the need for on-board processing. This is especially true for missions in which only a subset of the acquired data is considered useful or an immediate response to the data collected is needed. By processing data on-board a satellite, the quantity of downlinked data can be reduced, thus improving numerous mission parameters including power consumption, payload performance, and data latency. Accordingly, an ideal candidate for on-board processing would be a Synthetic Aperture Radar (SAR) satellite mission performing ship detection over large bodies of water, as any imagery that does not contain ships is of a lower value for this application. 
    
    Implementing on-board processing can be challenging, considering space-based conventional processors lag their ground-based counterparts by several generations. However, Field Programmable Gate Arrays (FPGAs) offer an alternative viable solution, as they have been shown to provide adequate tolerance to radiation, and achieve excellent performance. Moreover, the advent of high-level synthesis tools now allows for the rapid development and testing of FPGA algorithms. 
    
    Consequently, the Canadian Space Agency (CSA) has conducted a study to explore the feasibility of on-board processing of SAR data. A SAR processor based on the Spectral Analysis (SPECAN) algorithm was developed, converted to RTL using a high-level synthesis tool, and implemented on a low-power (~2W), low-mass (24g), processing card named the Q7, which was developed by Xiphos Technologies. Testing of the algorithm’s performance on the Q7 is currently underway. This study is part of a larger body of work funded by CSA’s technology development program, which aims at demonstrating Xiphos’ tools for several applications including hyperspectral data compression, quantum communications and planetary exploration rovers.
    
    This paper will discuss the need for on-board processing,  provide an overview of the Q7 card,  describe the SAR processor algorithm that was developed and implemented in hardware and finally, present the performance results on the development board.
    Abstract document

    IAC-16,B1,3,10,x34643.brief.pdf

    Manuscript document

    IAC-16,B1,3,10,x34643.pdf (🔒 authorized access only).

    To get the manuscript, please contact IAF Secretariat.