• Home
  • Current congress
  • Public Website
  • My papers
  • root
  • browse
  • IAC-17
  • B1
  • IP
  • paper
  • The acceleration with QDR memory for data managements in near-earth sar images orbital processing

    Paper number

    IAC-17,B1,IP,2,x37393

    Year

    2017

    Abstract
    Quad data rate (QDR) synchronous SRAM interface allows for performing simultaneous write and read operation to SRAM chips on both edges of the clock, thus providing a quadruple increase in the overall bandwidth than conservative SRAM. Originally created for networking processor for pockets processing by CYPRESS and MICRON companies, QDR currently is adapted by mainstream silicon-vendors such as Micron, Cypress, IDT, NEC, Samsung and Renesas. In computational applications for massive data processing at ten to hundred Gbit per second quantity, the memory system severely limits the scalability and performance of multi-core general processor (MCP) or massive parallel processing (MPP) system on ASIC or FPGA. Since memory bandwidth currently has been a bottleneck for data intensive tasks, having the ability to flexibly provision and schedule data in memory system with high throughput is of significant importance when regular and random memory access are both guaranteed.
    
    In this paper, we describe the accelerating with QDR synchronous interface and SRAM memory in a multicore system. We have demonstrated in a SDRAM and SRAM coexisting memory system that the scheduling of data inter-allocation in various execution intervals can significant reduce the access latency. The continuous bursty accesses to addressable block benefit DDR2/3 synchronous interface and SDRAM memory with 4.2Gbps/6.4Gbps throughput respectively. While random accesses, such as in-column data read and write, are more suitable through QDR interface and SRAM memory for the aggregate bandwidth, since such access intervals have a higher Random Transactions Rate (RTR) than DDR2/3 interface. The example applications include Matrix Multiplication, Matrix Transpose, 2D-FFT (Fast Fourier Transform), Sparse Matrix Accesses and 2D-DWT (Discrete Wavelet Transform)  in SAR image processing.
    
    In the proposal, we have evaluated the bandwidth improvement with the mentioned benchmarks and the results shows that an average of 1.5$\times$ and 4.2$\times$ performance gains with DDR+QDR interface than DDR-only and QDR only respectively. We have also implemented a multicore DSP processor with DDR and QDR interfaces and simulated an evaluated the performance gains on the distributed system platform. It shows that an average of 1.6$\times$ performance promoting than DDR only system.
    
    The full vision of this paper will provide a comprehensive introduction to the application of QDR in SAR image processing, the system integration to a multicore processor with BGA ceramic packaging and speed up of data exchange performance. We will see that QDR is a potential choice for high performance orbital observation raw data processing.
    Abstract document

    IAC-17,B1,IP,2,x37393.brief.pdf

    Manuscript document

    (absent)