HSDR-X – Design Choices in Maximising Data Return from Small Satellite Missions
- Paper number
IAC-20,B4,6A,12,x58468
- Author
Mr. David Cooke, United Kingdom, Surrey Satellite Technology Ltd (SSTL)
- Coauthor
Mr. David Feltham, United Kingdom, Surrey Satellite Technology Ltd (SSTL)
- Coauthor
Mr. Alex da Silva Curiel, United Kingdom, Surrey Satellite Technology Ltd (SSTL)
- Coauthor
Mr. Andrew Cawthorne, United Kingdom, Surrey Satellite Technology Ltd (SSTL)
- Coauthor
Prof. Martin Sweeting, United Kingdom, Surrey Satellite Technology Ltd (SSTL)
- Year
2020
- Abstract
This paper describes a novel and highly integrated payload downlink solution which includes a next generation High Speed Data Recorder (HSDR), data processor, and X-band downlink transmitter. The HSDR-X is designed to support small satellites with high data return requirements, and replace previous distinct systems which have formed part of a number of spacecraft on-orbit. The driver behind this development was to provide a common but flexible solution to payload data storage, processing and interfacing which could be used across a range of small satellite missions. The integrated approach also enables a significant reduction in the mass, volume and power, whilst also reducing mission costs and delivery times. The HSDR-X is an evolution of the highly successful out-going HSDR data recorder flown on 14 SSTL missions. Like the HSDR, the HSDR-X is based on a COTS on-orbit reconfigurable FPGA. Tightly integrated non-volatile NAND flash mass memory allows the removal of an entire NAND flash mass memory OBDH sub-system. Advances in DAC semiconductors means it is now possible to reach X-Band and even Ka-Band frequencies using Direct-RF digital techniques. The RF baseband modulator/exciter that has traditionally been its own sub-system of an RF transmitter can also be integrated with the payload data recorder. The removal of an entire OBDH mass memory and RF sub-system provide an overall reduction in mass, volume and power along with the advantages of a Direct-RF architecture. Only the addition of an RF PA is required to complete the RF chain. Ever increasing demands on the payload chain (particularly from higher resolution Earth imaging requirements) has meant a substantial increase in data storage bandwidth and capacity. An alternative to the brute-force store and forward approach is the evolving field of data reduction. Obvious methods include image compression and artefact rejection. However, with advances in GPU technologies and the rise of artificial intelligence, many potential and exciting methods of data reduction are possible. To facilitate access to this evolving field, the HSDR-X provides an FMC interface to accommodate data processing sub-modules. Applications are not restricted to GPUs but any FMC compliant board such as an RF ADC/DAC card for SIGINT or SAR signal generation/reception. The almost endless range of daughterboard applications all share the same advantages of overall payload mass, volume, power and cost reduction by tightly coupled integration to the in-orbit configurable platform data recorder.
- Abstract document
- Manuscript document
IAC-20,B4,6A,12,x58468.pdf (🔒 authorized access only).
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