Hardware-Accelerated Implementation of a Convolutional Neural Network-Based Image Processing Algorithm for the ESA Hera Mission
- Paper number
IAC-24,A3,IP,55,x90998
- Author
Mr. Gianfranco Di Domenico, Politecnico di Milano, Italy
- Coauthor
Mr. Aurelio Kaluthantrige, University of Strathclyde, United Kingdom
- Coauthor
Dr. Feng Jinglang, University of Strathclyde, United Kingdom
- Coauthor
Dr. Francesco Topputo, Politecnico di Milano, Italy
- Coauthor
Dr. Jesus Gil-Fernandez, ESA, Spain
- Year
2024
- Abstract
In recent years, the rapid advancement of artificial intelligence (AI) technologies has sparked a revolution in multiple fields. This transformative wave is now extending its influence to spacecraft systems, opening new mission paradigms characterized by intelligent mission operations, efficient computational guidance and navigation, and enhanced autonomy capabilities for space systems. However, the integration of ground-based AI technologies and algorithms into space assets faces a significant challenge due to the limited computational capabilities of typical spacecraft onboard computers. \noindent In this study, we present the development process of an IP core module for a Convolutional Neural Network (CNN)-based Image Processing (IP) algorithm designed to support proximity operations during the European Space Agency (ESA) Hera mission around the binary asteroid system (65803) Didymos. Our methodology involved initial preprocessing of the CNN model – originally developed with high-level programming languages and frameworks – through weights and bias quantization and pruning. Subsequently, we engineered a unified VHDL module capable of handling all convolutional and ReLU neural network layers. The resulting module accelerated inference times by a full order of magnitude, with minimal power consumption, preserving essential onboard computer (OBC) resources. \noindent We tested our module on both limited-resource platforms, such as the Zynq-7000 System-on-a-Chip (SoC), and more powerful field-programmable gate arrays (FPGAs) comparable to the ones constituting the Hera Image Processing Unit (IPU). The possibility of deploying the developed module as an onboard navigation experiment would contribute to the on-field validation of state-of-the-art space AI technologies.
- Abstract document
- Manuscript document
(absent)