Hardware-in-the-Loop Test for Argo GPS Receiver
- Paper number
IAC-07-D1.I.13
- Author
Mr. Wei-Ting Wei, National Space Organization, Taiwan, China
- Coauthor
Dr. Huaizu You, National Space Organization, Taiwan, China
- Coauthor
Mr. Ming-Yu Yeh, National Space Organization, Taiwan, China
- Coauthor
Dr. Ying-Wen Jan, National Space Organization, Taiwan, China
- Year
2007
- Abstract
Hardware-in-the-Loop (HIL) simulation is a technique that is used increasingly in the development and test of complex real-time embedded systems. HIL test provides an effective platform by adding the complexity of the plant under control, in this case, a space-grade GPS receiver, to the test platform, in this case, an artificial satellite. The Argo satellite, developed by National Space Organization (NSPO), Taiwan, is a small imaging satellite which has nominally a circular and sun-synchronous orbit with a low altitude of 620 km. The Argo GPS receiver has a patch antenna operating on L1 band. To dynamically generate satellite position and receiver antenna orientation inputs in the loop test, a mathematical orbit and attitude propagation model of the Argo satellite is embedded in a real-time control system. Through a serial port RS-232, those data is sent to a GPS simulator to mimic the dynamics of the receiver motion. Linked with an IEEE-488(GPIB) interface, an RF signal generator is commanded to broadcast GPS transmitted signals which are close to the case that Argo would observe in orbit. The GPS receiver receives the RF signal via a hardline cable. After acquisition and tracking of GPS satellites, the receiver sends navigation information back to the real-time control system through RS-232. This completes the loop, and the navigation error between prediction and measurements is used for criterion of the hardware performance. The performance of the selected GPS receiver is validated through the HIL test.
- Abstract document